推荐回答（2个）
In hardware the function of pipeline is implemented by inserting registers in the combinational logic. Long combinational path tends to cause low maximum frequency. If there is critical path in your design, you can use the pipeline to insert registers in the long combinational path to shorten it. Then the timing performance will be improved.
翻译一下，大概意思就是：流水线就是在延时较长的组合逻辑（一般是多级组合逻辑）中插入寄存器，将较长的组合逻辑拆分为多个较短的组合逻辑，以提高设计的最大时钟速率。流水线的缺点是会在设计中引入流水线延时，插入一级寄存器带来的流水线延时是一个时钟周期
简单的说就是在逻辑里插入寄存器。英文叫pipeline，所以翻译成流水线
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