xilinx中如何用generic语句实现同一模块的不同调用

实例化前加
generic map()
然后再
port map（）

例如：
GENERIC MAP (
clock_enable_input_a => "BYPASS",
clock_enable_output_a => "BYPASS",
intended_device_family => "Cyclone II",
lpm_hint => "ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=ram1",
lpm_type => "altsyncram",
numwords_a => 256,
operation_mode => "SINGLE_PORT",
outdata_aclr_a => "NONE",
outdata_reg_a => "UNREGISTERED",
power_up_uninitialized => "FALSE",
widthad_a => 8,
width_a => 8,
width_byteena_a => 1
)

只能调用符合某种规律的。
genvar i;
generate
for(i=0;i<5;i=i+1)
modulei(.i(i),.^.^.^);
endgenerate